This article is part of Bain’s Technology Report 2026

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For nearly two decades, software was tech’s fastest-growing sector while semiconductors and hardware operated in its shadow—admired for engineering, undervalued by markets. AI has reversed that.

Hardware and semiconductor valuations surged over the past several years while software valuations compressed—the so-called SaaSpocalypse (see Figure 1).

Figure 1

An AI infrastructure flywheel reversed the hierarchy. Hyperscaler capex, venture-backed neo-cloud build-out, and frontier-model development are fueling step-change demand for compute. That’s accelerating innovation across the hardware and semiconductor stack and creating new pockets of value in bottleneck technologies, such as high-bandwidth memory (HBM), leading-edge silicon and advanced packaging, optical networking, and custom AI silicon.

We’ll focus on three of the fastest-growing segments.

High-bandwidth memory

Samsung, SK Hynix, and Micron have become critical development partners in the AI data center boom, pushing HBM revenue up sharply since 2023 (see Figure 2).

Figure 2

To improve performance, dynamic random-access memory (DRAM)–based stacks are tightly integrated with a logic die at the base. That codevelopment means vendors can no longer swap HBM suppliers as easily as with commodity DRAM, shifting power dynamics.

High, stable margins are new to a famously cyclical memory market. SK Hynix and Micron posted record gross margins of 75% to 85% in each of the past two quarters. The three major DRAM players have concentrated most new capacity on HBM, leaving limited investment for conventional DRAM and NAND. That’s worsening shortages and raising the prices of smartphones and PCs.

Advanced packaging

As AI fuels near-insatiable demand for leading-edge compute, Moore's Law no longer bends the cost curve as it once did. Advanced packaging picks up some of the slack, delivering system-level performance and power gains.

Advanced packaging has become a competitive battleground of its own, and the market is growing rapidly (see Figure 3). Mature and emerging technologies will allow chipmakers to integrate heterogeneous dies that combine logic, memory, and input/output with performance approaching that of monolithic designs. The winners will define the next generation of compute density.

Figure 3

Custom silicon

Special-purpose, high-performance accelerators are moving from niche to mainstream as hyperscalers and AI-native firms design chips tuned to their workloads. The proliferation of these designs has fueled the rapid growth of Broadcom’s ASIC unit while smaller companies such as Groq and Cerebras have carved out defensible niches that are now beginning to scale. The result: ASICs are the fastest-growing segment of data center compute chips (see Figure 4).

Figure 4

Four shifts turned custom silicon from an uneconomic bet into the default strategy for anyone competing at scale.

The most important is the emergence of grand-scale, homogeneous workloads (training, inference, agentic) that now run well past the volume needed to amortize a custom design. Each favors different silicon architectures. Training’s sustained floating-point operations per second, throughput orientation, and lower-latency sensitivity require big, dense compute; large HBM; and fast scale-up/scale-out capabilities delivered only by GPUs, wafer-scale processors, or purpose-built chips. Inference's decode phase must reread the model's active weights and key-value (KV) cache from memory for every token, rewarding designs that keep everything in fast, on-chip memory to sidestep HBM constraints. Agentic resembles inference but accumulates context across multistep actions and leaves accelerators idle while waiting on tool calls. That favors less expensive places to park expanding context and faster ways to retrieve it, such as KV cache offloading, memory tiering, and software that toggles between flash and DRAM.

The second shift: The cost of buying turned punishing, with merchant GPU gross margins as high as 75%. Third, the make side got less expensive through the innovation of TSMC, ASIC design houses, and electronic design automation vendors (see Figure 5). This ecosystem has served up chiplets, advanced packaging, foundry capacity, and contract ASIC design services, letting buyers field custom parts without standing up a full silicon organization. Fourth, the payoff has never been higher. Silicon can account for most of a data center’s cost and power consumption, so every efficiency gain compounds.

Figure 5

Semiconductors as strategic assets

The pandemic-induced chip shortage made silicon supply a board-level priority, and now the AI boom has made revamping supply chains more urgent. For example, TSMC said it intends to build nine phases of new fabs this year, more than double its recent annual rate, while also increasing by 80% its manufacturing capacity of chip on wafer on substrate and system on integrated chips. Even so, the company has said it won't be able to keep up with customer demand. As leading-edge capacity tightens, single-source exposure brings pricing and supply risks from natural disasters, geopolitical disruption, and export controls.

Companies are securing multiple supply locations, not just multiple vendors. Foundries are responding in kind, particularly in logic chips (see Figure 6). This diversification answers geopolitical tension around Taiwan, still the industry's single-largest supply source and vulnerability.

Figure 6

Key implications

For tech and industrial leaders, hardware strategy is no longer solely the procurement team’s remit. It demands C-suite attention. Here are five of the most important takeaways for executives.

Product strategy matters more than ever. Every technology company now faces critical decisions about their silicon architecture and whether to build, buy, or partner. GPUs, CPUs, and ASICs each support inference and agentic workloads in different combinations, each with trade-offs among latency, memory, and other performance variables. Hyperscalers are seeking any edge, increasingly by designing (or even selling) their own chips. For example, Anthropic buys chips from Amazon and Google.

The old model—one vendor innovates and sells to everyone else—is no longer sustainable. A wave of verticalization is likely as leaders determine that they can’t cede control of their silicon. The industry is unlikely to revert to the horizontal PC-and-server model in which a handful of companies owned the intellectual property and hardware makers competed on assembly and marketing. A vertical structure is more difficult to navigate, making the build-buy-partner choice matter more. Elon Musk’s reported Terafab concept is the most extreme version of the bet, combining the logic, memory, and packaging under one owned roof.

Customers increasingly want to work directly with silicon makers. For example, automakers are starting to bypass the Tier 1 integrators that once sat between them and chip vendors. They want to tune hardware at a low level, ship features faster, and tighten security. Expect the same pull in other industries, along with rising demand for engineers who can work directly with silicon vendors.

Silicon value creation will become less concentrated. As custom work grows, value should spread out from Nvidia. ASICs may soon ship in greater volume than Nvidia’s GPUs, even if Nvidia keeps the larger revenue share (as Figure 4 above shows). Much of the new value will accrue to the companies behind the hyperscalers’ chips. A larger set of companies could capitalize, including semi-custom and legacy hardware providers. Design tool vendors that can speed custom silicon design also stand to gain.

Sourcing and supplier management now sit near the top of the C-suite agenda. Procurement has become strategy. How buyers treat their suppliers in good times matters when shortages hit. That means investing in supplier capacity, long-term agreements, equity investments in the supply chain, and multi-vendor, multi-geography sourcing. Companies that treat procurement and supplier relationships as an afterthought will pay for it sooner than later.

Governments will increasingly scrutinize silicon investments for domestic production. Now that they treat leading-edge silicon as strategic infrastructure, governments will push for domestic or allied production through subsidies, export controls, and local content rules.

Supply chain risk continues to grow with East-West tension. This has forced companies to reassess where they source and sell and whether they need distinct China and Western strategies. TSMC is working to get in front of this reality by committing $260 billion to build fabs in Arizona. For the West, the need for large-scale leading-edge production remains critical.

Recent conflicts in the Gulf region highlight a broader infrastructure risk: High-capex projects such as data centers and semiconductor fabs must account not only for resources and capital access but also exposure to military disruption, transport choke points, and regional security volatility.

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